Family Members' Experience of Discussions on End-of-Life Care in Nursing Homes in Japan: A Qualitative Descriptive Study of Family Members' Narratives.

In nursing homes, discussions between family members and staff regarding the end of life for residents with cognitive impairment are crucial to the choice of treatment and care consistent with residents' wishes. However, family members experience burden in such discussions, and communication with staff remains inadequate. The purpose of this qualitative descriptive study was to elucidate the meaning of continuous end-of-life discussion for family members. Data were collected using semistructured individual interviews. Thirteen family members of residents from 3 nursing homes in Kyoto, Japan, participated in the study. Data were analyzed using thematic analysis, which focused on both explicit and implicit meanings. Four themes emerged regarding the experience of end-of-life discussion: "the end of life soaking in, " "hardship of making the decision to end my family member's life, " "wavering thoughts about decisions made and actions taken, " and "feeling a sense of participation about the care." Family members had come to accept the deaths of residents through continuous discussion and experienced strong conflict in facing the death of their family members. Moreover, staff members should understand family members' beliefs and the burden they experience in facing residents' death

High Speed and Low Pedestal Error Bootstrapped CMOS Sample and Hold Circuit

A new high speed, low pedestal error bootstrapped CMOS sample and hold (S/H) circuit is proposed for high speed analog-to-digital converter (ADC). The proposed circuit is made up of CMOS transmission gate (TG) switch and two new bootstrap circuits for each transistor in TG switch. Both TG switch and bootstrap circuits are used to decrease channel charge injection and on-resistance input signal dependency. In result, distortion can be reduced. The decrease of channel charge injection input signal dependency also makes the minimizing of pedestal error by adjusting the width of NMOS and PMOS of TG switch possible. The performance of the proposed circuit was evaluated using HSPICE 0.18-m CMOS process. For 50 MHz sinusoidal 1 V peak-to-peak differential input signal with a 1 GHz sampling clock, the proposed circuit achieves 2.75 mV maximum pedestal error, 0.542 mW power consumption, 90.87 dB SNR, 73.50 SINAD which is equal to 11.92 bits ENOB, -73.58 dB THD, and 73.95 dB SFDR

CMOS Temperature Sensor with Programmable Temperature Range for Biomedical Applications

A CMOS temperature sensor circuit with programmable temperature range is proposed for biomedical applications. The proposed circuit consists of temperature sensor core circuit and programmable temperature range digital interface circuit. Both circuits are able to be operated at 1.0 V. The proposed temperature sensor circuit is operated in weak inversion region of MOSFETs. The proposed digital interface circuit converts current into time using Current-to-Time Converter (ITC) and converts time to digital data using counter. Temperature range can be programmed by adjusting pulse width of the trigger and clock frequency of counter. The proposed circuit was simulated using HSPICE with 1P, 5M, 3-wells, 0.18-μm CMOS process (BSIM3v3.2, LEVEL53). From the simulation of proposed circuit, temperature range is programmed to be 0 °C to 100 °C, it is obtained that resolution of the proposed circuit is 0.392 °C with -0.89/+0.29 °C inaccuracy and the total power consumption is 22.3 μW in 25 °C.

Proposal and design methodology of switching mode low dropout regulator for Bio-medical applications

The switching operation based low dropout (LDO) regulator utilizing on-off control is pre-sented. It consists of simple circuit elements which are comparator, some logic gates, switched capacitor and feedback circuit. In this study, we target the application to the power supply circuit for the analog front end (AFE) of bio-medical system (such as daily-used bio-monitoring devices) whose required maximum load current is 50 A. In this paper, the design procedure of the proposed LDO has been clarified and actual circuit design using the procedure has been done. The proposed LDO has been evaluated by SPICE simulation using 1P 2M 0.6 m CMOS process device parameters. From simulation results, we could confirm that the low quiescent current of 1 A with the output ripple of 5 mVpp. The circuit area is 0.0173 mm2 in spite of using 0.6 m design rules. The proposed circuit is suitable for adopting to the light load and low frequency applications

Simple Measurement System for Biological Signal Using a Smartphone

This paper describes simple measurement system for biological signal using smartphone. The proposed system consists of an instrumentation amplifier, a filter and an AC/DC converter. The biological signal is converted to the digital data through the microphone terminal with A/D converter in the smartphone. In many cases, the circuits require the power sources such as the cell batteries, however, the proposed system is supplied the power through the earphone terminal of the smartphone. Therefore, the proposed system no require the batteries. The software of this system parallelizes the processing so that the earphone output and the microphone terminal can be executed at the same time. The proposed system was verified through the measurement of surface electromyogram using discrete parts and iOS. Results of experimentation, the proposed system was operating correctly

New active diode with bulk regulation transistors and its application to integrated voltage rectifier circuit

This paper describes new active diode with bulk regulation transistors and its application to the integrated voltage rectifier circuit for a biological signal measurement system with smartphone. The conventional active diode with BRT has the dead region which causes leak current, and the output voltages of the application (e.g. voltage rectifier circuit) decrease. In order to overcome these problem, we propose new active diode with BRT which uses the control signal from the comparator of active diode to eliminate the dead region. Next we apply the proposed active diode with BRT to the integrated voltage rectifier circuit. The proposed active diode with BRT and voltage rectifier circuit were fabricated using 0.6 μm standard CMOS process. From experimental results, the proposed active diode with BRT eliminates the dead region perfectly, and the proposed voltage rectifier circuit generates + 2.86 V (positive side) and - 2.70 V (negative side) under the condition that the amplitude and frequency of the input sinusoidal signal are 1.5 V and 10 kHz, respectively, and the load resistance is 10 kΩ

Pattern Classification Using A Fuzzy Immune Network Model

It is generally believed that one major function of immune system is helping to protect multicellular organisms from foreign pathogens, especially replicating pathogens such as viruses, bacteria and parasites. The relevant events in immune system are not only the molecules, but also their interactions. The immune cells can respond either positively or negatively to the recognition signal. A positive response would result in cell proliferation, activation and antibody secretion, while a negative response would lead to tolerance and suppression. Depending upon these immune mechanisms, an immune network model(here, we call it the binary model) based on biological immune response network was proposed in our previous work. However, there are some problems like input and memory in the binary model. In order to improve the binary model, in this paper we propose a fuzzy immune network model. In the proposed fuzzy immune model, we add a normalization B cell layer for normalizing the large-scale antigen information on the base of the binary model. Meanwhile, a fuzzy AND operator(.AND.) and a normalization procedure called complement coding were employed in the proposed fuzzy immune model. Compute simulations illustrate that the proposed fuzzy model not only can improve the problems existing in the binary model but also is capable of clustering arbitrary sequences of large-scale analog input patterns into stable recognition categories. (author abst.